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ds04-29125-1e fujitsu semiconductor data sheet copyright?2006 fujitsu li mited all rights reserved spread spectrum clock generator mb88152a mb88152a-100/101/102/110/111/112 description mb88152a is a clock generator for em i (electro magnetic interference) reduction. the peak of unnecessary radiation noise (emi) can be attenuated by making the o scillation frequency slightly modulate periodically with the internal modulator. it corresponds to both of the ce nter spread which modulates input frequency as middle centered and down spread which modulates so as not to exceed input frequency. features ? input frequency : 16.6 mhz to 134 mhz output frequency : 16.6 mhz to 134 mhz modulation rate : 0.5 % , 1.5 % (center spread), ? 1.0 % , ? 3.0 % (down spread) equipped with oscillation circuit: ran ge of oscillation 16.6 mhz to 48 mhz modulation clock output duty : 40 % to 60 % modulation clock cycle-cycle jitter : less than 100 ps low current consumption by cmos proces s : 5 ma (24 mhz : typ-sample, no load) power supply voltage : 3.3 v 0.3 v operating temperature : ? 40 c to + 85 c package : sop 8-pin
mb88152a 2 product line-up mb88152a has three kinds of input frequenc y, and two kinds of modulation type (center/down spread), total six line- ups. pin assignment pin description product input/output frequenc y modulation type modulation enable pin mb88152a-100 16.6 mhz to 134 mhz down spread no mb88152a-101 16.6 mhz to 67 mhz yes mb88152a-102 40 mhz to 134 mhz mb88152a-110 16.6 mhz to 134 mhz center spread no mb88152a-111 16.6 mhz to 67 mhz yes mb88152a-112 40 mhz to 134 mhz pin name i/o pin no. description xin i 1 crystal resonator connection pin/clock input pin xout o 2 crystal resonator connection pin v ss ? 3gnd pin sel i 4 modulation rate setting pin ckout o 5 modulated clock output pin v dd ? 6 power supply voltage pin freq/freq0 i 7 frequency setting pin xens/freq1 i 8 modulation enable setting pin/frequency setting pin 1 2 3 4 8 7 6 5 xin xout v ss s el xen s freq v dd ckout 1 2 3 4 8 7 6 5 xin xout v ss s el freq1 freq0 v dd ckout mb 88 152a-101 mb 88 152a-102 mb 88 152a-111 mb 88 152a-112 mb 88 152a-100 mb 88 152a-110 fpt-8p-m02 fpt-8p-m02 top view
mb88152a 3 i/o circuit type note : for xin and xout pins, refer to ? oscillation circuit?. pin circuit type remarks sel freq freq0 freq1 xens cmos hysteresis input ckout cmos output i ol = 4 ma
mb88152a 4 handling devices preventing latch-up a latch-up can occur if, on this de vice, (a) a voltage higher than v dd or a voltage lower than v ss is applied to an input or output pin or (b) a voltage hig her than the rating is applied between v dd and v ss . the latch-up, if it occurs, significantly increases the power s upply current and may cause thermal destruction of an element. when you use this device, be very careful not to exceed the maximum rating. handling unused pins do not leave an unused input pin open, since it ma y cause a malfunction. handle by, using a pull-up or pull-down resistor. unused output pin should be opened. the attention when the external clock is used input the clock to xin pin, and xout pin s hould be opened when you use the external clock. please pay attention so that an overshoot and an undershoot do not o ccur to an input clock of xin pin. power supply pins please design connecting the power supply pin of this devi ce by as low impedance as possible from the current supply source. we recommend connecting electrolytic capacitor (about 10 f) and the ceramic capacitor (about 0.01 f) in parallel between v ss and v dd near the device, as a bypass capacitor. oscillation circuit noise near the xin and xout pins may cause the device to malfunction. design printed circuit boards so that electric wiring of xin or xout pin and resonator (or ceramic oscillator) do not intersect other wiring. design the printed circuit board that su rrounds the xin and xout pins with ground.
mb88152a 5 block diagram v dd ckout v ss r f = 1 m ? s el xout xin freq/freq0 xen s /freq1 1 ? m 1 ? n 1 ? l idac ico pll block modulation rate setting frequency setting modulation enable / frequency setting reference clock clock output reference clock phase compare v/i conversion modulation clock output loop filter modulation logic mb88152a pll block modulation rate setting/ modulation enable setting charge pump a glitchless idac (current output d/a conv erter) provides precise modulation, thereby dramatically reducing emi.
mb88152a 6 pin setting when changing the pin setting, the stabilization wait time for the modulation clock is required. the stabilization wait time for the modulation clock takes the maximum value of lock-up time in ? electrical character- istics ? ac characteristics lock-up time?. modulation enable setting note : mb88152a-100 and 110 do not have xens pin. sel modulation rate setting note : the modulation rate can be c hanged at the level of the terminal. frequency setting note : mb88152a-100 and 110 do not have freq pin. frequency setting note : mb88152a-101, 111, 102 and 112 ha ve neither freq0 pin nor freq1 pin. xens modulation l modulation mb88152a-101, 102, 111, 112 h no modulation sel modulation rate remarks l 0.5 % mb88152a-110, 111, 112 center spread ? 1.0 % mb88152a-100, 101, 102 down spread h 1.5 % mb88152a-110, 111, 112 center spread ? 3.0 % mb88152a-100, 101, 102 down spread freq frequency l 16.6 mhz to 40 mhz mb88152a-101, 111 40 mhz to 80 mhz mb88152a-102, 112 h 33 mhz to 67 mhz mb88152a-101, 111 66 mhz to 134 mhz mb88152a-102, 112 freq1 freq0 frequency l l 16.6 mhz to 40 mhz mb88152a-100, 110 l h 33 mhz to 67 mhz h l 40 mhz to 80 mhz h h 66 mhz to 134 mhz
mb88152a 7 ? center spread spectrum is spread (modulated) by centering on the input frequency. ? down spread spectrum is spread (modulated) below the input frequency. ? 1.5% + 1.5% radiation level input frequency frequency center spread example of 1.5 % modulation rate 3.0 % modulation width ? 3.0% radiation level input frequency frequency down spread example of ? 3.0 % modulation rate 3.0 % modulation width
mb88152a 8 absolute maximum ratings * : the parameter is based on v ss = 0.0 v. warning: semiconductor devices can be permanently dama ged by application of stress (voltage, current, temperature, etc.) in excess of absolute ma ximum ratings. do not exceed these ratings. parameter symbol rating unit min max power supply voltage* v dd ? 0.5 + 4.0 v input voltage* v i v ss ? 0.5 v dd + 0.5 v output voltage* v o v ss ? 0.5 v dd + 0.5 v storage temperature t st ? 55 + 125 c operation junction temperature t j ? 40 + 125 c output current i o ? 14 + 14 ma overshoot v iover ? v dd + 1.0 (t over 50 ns) v undershoot v iunder v ss ? 1.0 (t under 50 ns) ? v v dd v ss input pin overshoot/undershoot t under 50 ns t over 50 ns v iover v dd + 1.0 v v iunder v ss ? 1.0 v
mb88152a 9 recommended operating conditions (v ss = 0.0 v) warning: the recommended operating conditions are requir ed in order to ensure the normal operation of the semiconductor device. all of the device?s electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating cond ition ranges. operation outside these ranges may adversely affect re liability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol pin conditions value unit min typ max power supply voltage v dd v dd ? 3.0 3.3 3.6 v ?h? level input voltage v ih sel, freq/freq0, xens/freq1 ? v dd 0.8 ? v dd + 0.3 v xin input through rate 3 v / ns 16.6 mhz to 100 mhz v dd 0.8 ? v dd + 0.3 v input through rate 3 v / ns 100 mhz to 134 mhz v dd 0.9 ? v dd + 0.3 v ?l? level input voltage v il sel, freq/freq0, xens/freq1 ? v ss ? v dd 0.2 v xin input through rate 3 v / ns 16.6 mhz to 100 mhz v ss ? v dd + 0.2 v input through rate 3 v / ns 100 mhz to 134 mhz v ss ? v dd + 0.1 v input clock duty cycle t dci xin 16.6 mhz to 100 mhz 40 50 60 % 100 mhz to 134 mhz 45 50 55 operating temperature ta ??? 40 ? + 85 c ckin t a t b 1.5 v input clock duty cycle (t dci = t b /t a )
mb88152a 10 electrical characteristics dc characteristics (ta = ? 40 c to + 85 c, v dd = 3.3 v 0.3 v, v ss = 0.0 v) parameter sym- bol pin conditions value unit min typ max power supply current i cc v dd 24 mhz output no load capacitance ? 5.0 7.0 ma output voltage v oh ckout ?h? level output i oh = ? 4 ma v dd ? 0.5 ? v dd v v ol ?l? level output i ol = 4 ma v ss ? 0.4 v output impedance z o ckout 16.6 mhz to 134 mhz ? 45 ?? input capacitance c in xin, sel, freq/ freq0, xens/ freq1 ta = + 25 c v dd = v i = 0.0 v f = 1 mhz ?? 16 pf load capacitance c l ckout 16.6 mhz to 67 mhz ?? 15 pf 67 mhz to 100 mhz ?? 10 100 mhz to 134 mhz ?? 7
mb88152a 11 ac characteristics (ta = ? 40 c to + 85 c, v dd = 3.3 v 0.3 v, v ss = 0.0 v) parameter sym- bol pin conditions value unit min typ max oscillation frequency f x xin, xout fundamental oscillation 16.6 ? 40 mhz 3rd over tone 40 ? 48 input frequency f in xin mb88152a-100, 110 16.6 ? 134 mhz mb88152a-101, 111 16.6 ? 67 mb88152a-102, 112 40 ? 134 output frequency f out ckout mb88152a-100, 110 16.6 ? 134 mhz mb88152a-101, 111 16.6 ? 67 mb88152a-102, 112 40 ? 134 output slew rate sr ckout 0.4 v to 2.4 v load capacitance 15 pf 0.4 ? 4.0 v/ns output clock duty cycle t dcc ckout 1.5 v 40 ? 60 % modulation cycle f mod ckout ?? 12.5 ? khz lock-up time t lk ckout ?? 25ms cycle-cycle jitter t jc ckout no load capacitance, ta = + 25 c, v dd = 3.3 v, standard deviation ?? 100 ps
mb88152a 12 output clock duty cycle (t dcc = t b /t a ) input frequency (f in = 1/t in ) output slew rate (sr) cycle-cycle jitter (t jc = | t n ? t n + 1 |) ckout 1.5 v t a t b 0.8 v dd t in ckin 2.4 v 0.4 v t f t r ckout note : sr = (2.4 ? 0.4) /t r , sr = (2.4 ? 0.4) /t f t n+1 t n ckout note : cycle-cycle jitter is defined the differen ce between a certain cycle and immediately after (or, immediately before) .
mb88152a 13 modulation waveform f mod = 12.5 khz (typ) ? 1.5 % + 1.5 % f mod = 12.5 khz (typ) ? 1.0 % ? 0.5 % ? 1.5 % modulation rate, example of center spread ? ? 1.0 % modulation rate, example of down spread ckout output frequency ckout output frequency frequency at modulation off frequency at modulation off time time
mb88152a 14 lock-up time if the setting pin is fixed at the ?h? or ?l? level, the maximum time after the power is turned on until the set clock signal is output from ckout pin is (the stabiliz ation wait time of input clock to xin pin) + (the lock-up time ?t lk ?). for the input clock stabilization time, check the c haracteristics of the resonator or oscillator used. for modulation enable control using the xens pin during norm al operation, the set clock signal is output from ckout pin at most the lock-up time (t lk ) after the level at the xens pin is determined. note : when the pin setting is changed, the ckout pin outp ut clock stabilization time is required. until the output clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle- cycle jitter cannot be guaranteed. it is therefore advisabl e to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time. 3.0 v v dd xin setting pin sel freq1/xens freq0/freq v ih ckout internal clock stabilization wait time t lk (lock-up time ) v ih v il xin xens ckout t lk (lock-up time ) t lk (lock-up time )
mb88152a 15 oscillation circuit the left side of figures below shows the connection ex ample about general resonator. the oscillation circuit has the built-in feedback resistance (1 m ? ). the value of capacity (c 1 and c 2 ) is required adjusting to the most suitable value of an individual resonator. the right side of figures below shows the example of connecting for the 3rd over-tone resonator. the value of capacity (c 1 , c 2 and c 3 ) and inductance (l 1 ) is needed adjusting to the most suitable value of an individual resonator. the most suitable value is different by indivi dual resonator. please refer to the resonator manufacturer which you use for the most su itable value. when an external clock is us ed (the resonator is not used), input the clock to xin pin and do not connect anything with xout pin. c 1 r f (1 m ? ) c 2 c 1 l 1 r f (1 m ? ) c 2 c 3 xin pin xout pin xin pin xout pin mb88152a internal mb88152a external fundamental resonator 3rd over tone resonator ? when using an external clock open r f (1 m ? ) note : note that a jitter characteristic of an in put clock may cause an affect a cycle-cycle jitter characteristic. mb88152a lsi internal mb88152a lsi external xout pin xin pin external clock ? when using the resonator
mb88152a 16 interconnection circuit example 1 2 3 4 8 7 6 5 mb88152a c 1 c 2 c 4 c 3 r 1 + c 1 , c 2 : oscillation stabilization capacitance (refer to " oscillation circuit?.) c 3 : capacitor of 10 f or higher c 4 : capacitor about 0.01 f (connect a capacitor of good high frequency property (ex. laminated ceramic capacitor) to close to this device.) r 1 : impedance matching resistor for board pattern sel freq/freq0 xens/freq1
mb88152a 17 example characteristics the condition of the examples of the characteristics is shown as follows : input frequency = 20 mhz ( output frequency = 20 mhz : use for mb88152a - 111 ) power-supply voltage = 3.3 v , none load capacity , modulation rate = 1.5 % ( center spread ) . spectrum analyzer hp4396b is co nnected with ckout. the result of the measurement with, rbw = 1 khz ( att use for ? 6 db ) . ch b spectrum 10 db /ref 0 dbm avg 4 rbw# 1 kh z vbw 1 kh z att 6 db center 20 mh z swp 2.505 s span 4 mh z no modulation ? 7.44 dbm 1.5 % modulation ? 25.75 dbm
mb88152a 18 ordering information part number input/output frequency modulation type modulation enable pin package remarks mb88152apnf-g-100-jne1 16.6 mhz to 134 mhz down spread no 8-pin plastic sop (fpt-8p-m02) mb88152apnf-g-101-jne1 16.6 mhz to 67 mhz down spread yes mb88152apnf-g-102-jne1 40 mhz to 134 mhz down spread yes mb88152apnf-g-110-jne1 16.6 mhz to 134 mhz center spread no mb88152apnf-g-111-jne1 16.6 mhz to 67 mhz center spread yes mb88152apnf-g-112-jne1 40 mhz to 134 mhz center spread yes mb88152apnf-g-100-jn-efe1 16.6 mhz to 134 mhz down spread no 8-pin plastic sop (fpt-8p-m02) emboss taping (ef type) mb88152apnf-g-101-jn-efe1 16.6 mhz to 67 mhz down spread yes mb88152apnf-g-102-jn-efe1 40 mhz to 134 mhz down spread yes mb88152apnf-g-110-jn-efe1 16.6 mhz to 134 mhz center spread no mb88152apnf-g-111-jn-efe1 16.6 mhz to 67 mhz center spread yes mb88152apnf-g-112-jn-efe1 40 mhz to 134 mhz center spread yes mb88152apnf-g-100-jn-ere1 16.6 mhz to 134 mhz down spread no 8-pin plastic sop (fpt-8p-m02) emboss taping (er type) mb88152apnf-g-101-jn-ere1 16.6 mhz to 67 mhz down spread yes mb88152apnf-g-102-jn-ere1 40 mhz to 134 mhz down spread yes mb88152apnf-g-110-jn-ere1 16.6 mhz to 134 mhz center spread no mb88152apnf-g-111-jn-ere1 16.6 mhz to 67 mhz center spread yes MB88152APNF-G-112-JN-ERE1 40 mhz to 134 mhz center spread yes
mb88152a 19 package dimension please confirm the latest package dimension by following url. http://edevice.fujitsu.com/f j/datasheet/ef-ovpklv.html 8 -pin pl as tic s op le a d pitch 1.27 mm p a ck a ge width p a ck a ge length 3 .9 5.05 mm le a d s h a pe g u llwing s e a ling method pl as tic mold mo u nting height 1.75 mm max weight 0.06 g 8 -pin pl as tic s op (fpt- 8 p-m02) (fpt- 8 p-m02) c 2002 fujit s u limited f0 8 004 s -c-4-7 1.27(.050) 3 .900. 3 0 6.000.40 .199 ?.00 8 +.010 ?0.20 +0.25 5.05 0.1 3 (.005) m (.154.012) (.2 3 6.016) 0.10(.004) 14 5 8 0.440.0 8 (.017.00 3 ) ?0.07 +0.0 3 0.22 .009 +.001 ?.00 3 45 ? 0.40(.016) "a" 0~ 8 ? 0.25(.010) (mo u nting height) det a il s of "a" p a rt 1.550.20 (.061.00 8 ) 0.500.20 (.020.00 8 ) 0.600.15 (.024.006) 0.150.10 (.006.004) ( s t a nd off) 0.10(.004) * 1 * 2 dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s . note 1) * 1 : the s e dimen s ion s incl u de re s in protr us ion. note 2) * 2 : the s e dimen s ion s do not incl u de re s in protr us ion. note 3 )pin s width a nd pin s thickne ss incl u de pl a ting thickne ss . note 4) pin s width do not incl u de tie ba r c u tting rem a inder.
mb88152a f0612 fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any ot her right of fujitsu or any third party or does fujitsu warrant non-in fringement of any third-party?s intellectual property right or othe r right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremel y high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, ai rcraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon syst em), or (2) for use requiring extremely high reliability (i.e., su bmersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design m easures into your facility and equipment such as redundancy, fi re protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. the company names and brand names herein are the trademarks or registered trademarks of their respective owners. edited business promotion dept.

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